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专利名称：BUFFER CIRCUIT
发明人：TAKEMAE, YOSHIHIRO,NOZAKI,
SHIGEKI,MEZAWA, TSUTOMU,KABASHIMA,KATSUHIKO,ENOMOTO, SEIJI
申请号：EP82301133申请日：19820305公开号：EP0060105A3公开日：19830615
摘要：A buffer circuit, mainly comprised of a flip-flop (FF), is disclosed. The flip-flopreceives an external input (ADD) via a first input circuit (IN,) and a reference voltage (REF)via a second input circuit (IN2), then produces internal complementary outputs (A,A) viaan output circuit (OUT) which uses the bootstrap effect. The flip-flop cooperates with atleast one level setting device (X) by way of the second input circuit (IN2). The level settingdevice functions to produce a voltage level (at N12) to de-activate the second inputcircuit (IN2) only during the activation of the flip-flop (with φ1 on).
申请人：FUJITSU LIMITED
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