PWM buffer circuit for adjusting a frequency and a

专利名称：PWM buffer circuit for adjusting a frequency

and a duty cycle of a PWM signal

发明人：Chun-lung Chiu,Wen-shi Huang申请号：US11751336申请日：20070521公开号：US07772902B2公开日：20100810

专利附图：

摘要：A PWM buffer circuit includes a duty cycle converting circuit and a frequency-fixed PWM signal generating circuit. The duty cycle converting circuit is used for receivinga first PWM signal and then generating a duty cycle reference voltage on the basis of the

first PWM signal. The duty cycle reference voltage is a one-to-one mapping function ofthe first duty cycle. The frequency-fixed PWM signal generating circuit is used for

receiving the duty cycle reference voltage and then outputting a second PWM signal witha fixed frequency. The second PWM signal has a second duty cycle, which is determined inaccordance with the duty cycle reference voltage. In addition, the second duty cycle is aone-to-one mapping function of the duty cycle reference voltage.

申请人：Chun-lung Chiu,Wen-shi Huang

地址：Changhua County TW,Taoyuan County TW

国籍：TW,TW

代理机构：Muncy, Geissler, Olds & Lowe, PLLC

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